1. Field of the Invention
This invention relates to a nonvolatile semiconductor memory, and more particularly to a NAND flash memory having a partial SOI structure.
2. Description of the Related Art
A nonvolatile semiconductor memory, such as a NAND flash memory, has been used as a storage unit for various electronic devices.
As memory capacity and integration have been growing in recent years, the memory cells have been microfabricated further.
The technique for forming memory cells in a silicon-on-insulator (SOI) region provided at the surface of a semiconductor substrate has been proposed as a method for microfabrication (e.g., Jpn. Pat. Appln. KOKAI Publication No. 2006-73939).
The reason why this technique is used for microfabrication is that the formation of memory cells in the SOI region makes it possible to suppress a short-channel effect caused by microfabrication.
It is desirable to use a highly crystalline epitaxial layer as an SOI layer formed in the SOI region. For this reason, the epitaxial layer is formed so that its crystal axis aligns with that of the semiconductor substrate by epitaxially growing an amorphous film covering the entire surface of the substrate in the lateral direction using the top surface of the exposed semiconductor substrate not covered with a buried oxide film.
However, the epitaxial layer on the aforementioned buried oxide film inevitably contains many grain boundaries. Since the grain boundaries are formed at random in the epitaxial layer, the memory cell characteristic varies between a memory cell with a crystal grain boundary in the channel region and a memory cell with no crystal grain boundary.
The variation becomes significant as the memory cells are microfabricated more, which decreases the reliability of the flash memory.